Hi there,
I am using the `make check' facility offered by Automake. However, I need to realize something just a bit more complex than this. What I need to have is a way to specify that the ordinary behavior of `make check' should be repeated a number of times, each time with a different choice of compilation flags. To obtain this effect, now I do something like
test1_flags1_SOURCES = test1.cc test1_flags1_CXXFLAGS = $(FLAGS1)
test1_flags2_SOURCES = test1.cc test1_flags2_CXXFLAGS = $(FLAGS2) ... test2_flags_1_SOURCES = test2.cc test2_flags1_CXXFLAGS = $(FLAGS2) ...
Since the number of tests can go up to a few hundreds and the possible flags go up to a dozen, this is not going to work: it is difficult to maintain and the generated Makefile is too heavy.
Instead, what I would like to have is to only say
test1_SOURCES = test1.cc test2_SOURCES = test2.cc ...
and then achieve the effect of (sorry for the pseudo-code)
for flags in $FLAGS_CHOICES do make check with CXXFLAGS="$flags" force recompilation at the next iteration (e.g., by erasing executables) done
How can I best obtain this effect without giving up (too many of) the advantages offered by Automake? Many thanks in advance,
Roberto
P.S. Actually, it would be nice to also get rid of
test1_SOURCES = test1.cc test2_SOURCES = test2.cc ...
in favor of something more concise, but this is another story.